Makefile generate dependency automatically does not work

I have four cpp files and so many .h files. I expect my make file generates the appropriate .d file for each .cpp file and compiles them to .o and then links them. Could some one tell me what is wrong with this code? it does not work in the way that it should.

Btw, I am beginner in makefile! Please do not link to somewhere with hard explanation for highly experts.

$make

g++ -c -g -Wall -Wconversion -Wfatal-errors -Wextra -std=c++11 -MD -MP -MF ./bin/obj/app/sim_rhs.d -o bin/obj/app/sim_rhs.o app/sim_rhs.cpp

app/sim_rhs.cpp:49:1: fatal error: opening dependency file ./bin/obj/app/sim_rhs.d: No such file or directory

}

^

compilation terminated.

make: *** [bin/obj/app/sim_rhs.o] Error 1

Cpp Files:

main.cpp
app/sim_rhs.cpp
app/sim_mids.cpp
app/sim_outputs.cpp

Makefile

SOURCES := main.cpp  app/sim_rhs.cpp app/sim_mids.cpp app/sim_outputs.cpp
OUTDIR:= ./out
BINDIR:= ./bin
OBJDIR:= ./bin/obj
OBJECTS := $(addprefix $(OBJDIR)/,$(SOURCES:.cpp=.o))
DEPFILES:= $(OBJECTS:.o=.d)

CXX := g++
CXXFLAGS := -c -g -Wall -Wconversion -Wfatal-errors -Wextra -std=c++11 -MD -MP
CXXTestFLAGS := -g -Wall -Wconversion -Wfatal-errors -Wextra -std=c++11

LIBS:= -lboost_filesystem -lboost_system 

# default
%:: $(BINDIR)/sim

# Link the executable
$(BINDIR)/sim: $(OBJECTS)
    $(CXX) $(LDFLAGS) $^ -o $@ $(LIBS)

run:
    $(BINDIR)/sim

$(OBJDIR)/%.o: %.cpp
    $(CXX) $(CXXFLAGS) -MF $(OBJDIR)/$*.d -o $@  $<

-include $(DEPFILES)